HUANG, Shanshi - HKUST Class Schedule & Quota

Class Schedule & Quota
2025-26 Spring 2025-26 Winter 2025-26 Fall 2024-25 Summer
2025-26 Spring
Common Core Course
The class information on this page will normally be updated every 15 to 20 minutes during class enrollment period.
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AIAA AMAT BSBE CMAA CNCC CNGF DLED DSAA EOAS FTEC FUNH INFH INTR IOTA IPEN LANG MICS MSSM PDEV PLED ROAS SEEN SMMG SOCH SYSH UCMP UCUG UFUG UGOD

COURSE INFO

VECTOR	[3-0-0:3]
DESCRIPTION	This course dicusses the design of Array Processors for traditional signal processing and scientific computation. The similar concepts have been widely used in recent ML algorithms. This course will trace back to a more general view of array processors design. The topics that will be covered in this course include: typical signal/image processing algorithms, algorithm mapping, systolic array, wavefronyt array, and some system and software design related.

VECTOR

[3-0-0:3]

DESCRIPTION

This course dicusses the design of Array Processors for traditional signal processing and scientific computation. The similar concepts have been widely used in recent ML algorithms. This course will trace back to a more general view of array processors design. The topics that will be covered in this course include: typical signal/image processing algorithms, algorithm mapping, systolic array, wavefronyt array, and some system and software design related.

MICS 6001O - VLSI Array Processors (3 units)

Section	Date & Time	Room	Instructor	Quota	Enrol	Avail	Wait	Remarks
L01 (6094)	Tu 09:00AM - 11:50AM	Rm 105, W3	HUANG, Shanshi	20	0	20	0